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PROJECTGRAMS AND DLXPLUS: VISUAL TOOLS FOR COMPUTER ARCHITECTURE AND ORGANIZATION EDUCATION
University of the Philippines, Diliman (PHILIPPINES)
About this paper:
Appears in: INTED2009 Proceedings
Publication year: 2009
Pages: 3334-3343
ISBN: 978-84-612-7578-6
ISSN: 2340-1079
Conference name: 3rd International Technology, Education and Development Conference
Dates: 9-11 March, 2009
Location: Valencia, Spain
Abstract:
The contributions of simulators in engineering and other similar and related fields are undoubtedly valuable. They pave the way for technology to flourish by providing access to tools that are not always readily available. Simulators have even made their way into the academe by providing visual aids and tools to test, develop and hone theories into practical applications, and progressively, into new technologies.
Computer architecture education is no exception to this fact—especially since the subject is extensive in scope and is heavily detailed. The primary goal of ProjectGRAMS and DLXPlus is to provide instructors and students with a tool that will aid them in understanding the basic workings of the subject.
ProjectGRAMS is a MIPS simulator that provides methods to easily visualize the effects of instruction set variations in different datapath implementations. A new set of single cycle, multi-cycle, and pipelined datapaths are generated depending on the instructions chosen by the user. The application accepts MIPS assembly programs from the user for testing a particular configuration’s performance. The performance of a machine is quantified through basic metrics such as instruction count, machine cycles to execute a program and cycles per instruction, among others. The simulator also presents a graphical and animated representation of the data transfer between components when executing instructions on a MIPS machine.
DLXPlus, on the other hand, is a visual 32-bit DLX microprocessor simulator with a configurable memory subsystem. With the aid of a visualization module along with a clock cycle diagram generator, it simulates the execution of instructions through the DLX five-stage pipeline. It also presents cache and processor performance statistics which are essential in evaluating different programs. Some of these metrics include the miss and hit counts, miss rate, and the number of memory accesses with the corresponding average access time for the instruction and data caches along with the number of execution cycles and stalls for the processor. The program integrates DCC and DASM into a functional module where the user could input his test programs written in C. The simulator also generates memory trace files containing pertinent simulation data that can be used with other simulators.
Helping students understand basic computer architecture and organization was the key drive in the inception of ProjectGRAMS and DLXPlus. Once proven successful in that goal, it won’t be hard to imagine courses using simulators as the main teaching methodology rather than just a simple visual aid and tool.

Keywords:
mips, dlx, processor simulation, datapath, memory subsystem, architecture reconfiguration.