About this paper

Appears in:
Pages: 6109-6118
Publication year: 2011
ISBN: 978-84-614-7423-3
ISSN: 2340-1079

Conference name: 5th International Technology, Education and Development Conference
Dates: 7-9 March, 2011
Location: Valencia, Spain

INTEGRATED DEVELOPMENT ENVIRONMENT FOR VIRTUAL LABORATORY

O. Jirák, Z. Křivka, Z. Vašíček

Brno University of Technology (CZECH REPUBLIC)
This paper describes an integrated development environment (IDE) aimed for the beginner developers of embedded systems (students of computer science and engineering attending hardware-oriented courses). The goal of our project is to provide an easy-to-use software tool and integrate it into the educational process where it should improve the education of the so called hardware-software (HW-SW) co-design approach. In our project, we have explored the easiest way of the design and the implementation of small systems based on field programmable gate array (FPGA) and microcontroller technology. Presented IDE is a software part of the larger project that intends to create a virtual laboratory of microprocessor technology (VLAM).

In the first part, we investigate the behavior of the HW-SW beginner, his demands, and needs. In the design of IDE, we emphasize user-friendly, intuitive, and effective graphical user interface (GUI) based on Eclipse development platform.

In the second part, we will focus on the possibilities of visualization at different levels of detail; such as port hierarchy, port interconnection, zoom levels, port/component/interconnection properties, etc. In addition, we explore the usage of the advanced GUI elements such as tooltips, customized graphical elements, and colors to make the use of VLAM IDE more effective.

In order to simplify the design and to provide user friendly way of designing of the embedded systems, VLAM IDE integrates semi-automatic interconnection inference mechanism that is able to help with the connection between two given components that user selects. As a result, the algorithm is able to suggest the set of the best interconnection schemes between these components from the syntactical and partially semantic point of view. Then, the user chooses one of resulting interconnection variants that suits his needs and/or makes manual adjustments. Specifically, GUI for the interaction with the algorithm (input, user’s choice) is introduced here.

The final step of the design-flow includes the process of hardware description generation as well as C code generation. The code generation module utilizes Java Emitter Template system that emits the system description in chosen hardware description language such as VHDL or Verilog. To complete user-friendly VLAM IDE, we have to cooperate with a few external tools such as compiler, debugger, synthesizer, and flash utility that is able to configure target board that contains FPGA.

As a conclusion, there are discussed several pros and cons including future features of VLAM IDE.
@InProceedings{JIRAK2011INT,
author = {Jir{\'{a}}k, O. and Křivka, Z. and Vaš{\'{i}}ček, Z.},
title = {INTEGRATED DEVELOPMENT ENVIRONMENT FOR VIRTUAL LABORATORY},
series = {5th International Technology, Education and Development Conference},
booktitle = {INTED2011 Proceedings},
isbn = {978-84-614-7423-3},
issn = {2340-1079},
publisher = {IATED},
location = {Valencia, Spain},
month = {7-9 March, 2011},
year = {2011},
pages = {6109-6118}}
TY - CONF
AU - O. Jirák AU - Z. Křivka AU - Z. Vašíček
TI - INTEGRATED DEVELOPMENT ENVIRONMENT FOR VIRTUAL LABORATORY
SN - 978-84-614-7423-3/2340-1079
PY - 2011
Y1 - 7-9 March, 2011
CI - Valencia, Spain
JO - 5th International Technology, Education and Development Conference
JA - INTED2011 Proceedings
SP - 6109
EP - 6118
ER -
O. Jirák, Z. Křivka, Z. Vašíček (2011) INTEGRATED DEVELOPMENT ENVIRONMENT FOR VIRTUAL LABORATORY, INTED2011 Proceedings, pp. 6109-6118.
User:
Pass: