Supélec (FRANCE)
About this paper:
Appears in: EDULEARN10 Proceedings
Publication year: 2010
Pages: 2179-2187
ISBN: 978-84-613-9386-2
ISSN: 2340-1117
Conference name: 2nd International Conference on Education and New Learning Technologies
Dates: 5-7 July, 2010
Location: Barcelona, Spain
Teaching Computer Systems Architecture at Supélec involves both lectures and projects. We have defined and implemented a pedagogical simulator devoted to process synchronization problems. Its main aim is to help students to better understand the problems involved in variable sharing between two processes, and allow them to solve the problems, using semaphores. The simulator offers an instruction library based on a pedagogical processor used in the Computer Systems Architecture course. Students will drag-and-drop the instructions into the two instruction lists used for the processes. The overall program should fulfill the global requirements, and produce the right value for the shared variable, regardless of the execution order of the instructions. Students use our code analysis software to check the correctness of their design. If the algorithm detects a failure in the shared variable use, it builds an execution flow that exemplifies the failure. The students can follow the flow, step-by-step, by browsing through a series of on-the-fly computed panels, each one displaying the critical values of the processor registers as well as process description record fields and the current instruction field or a shared variable. The explanation panel includes arrows that point to every information transfer and a short text that describes the current overall status. The analysis and explanation builder software has been designed according to a very simple instruction set of our pedagogical computer which has properties that reduce the complexity of the student code diagnosis algorithm. The simulator is currently accessible online to our 400 students who have given us a very positive feedback on it, and are asking for its extension to other problems. This ability has been included in the simulator pre-requirements, first by offering an open instruction library, second by designing an analysis tool able to work either with various sets of instruction sequences, or with more than two processes, multiple semaphores and/or shared variables. The most innovative aspect of our pedagogical experience is the ability to explain very precisely the faulty behavior to our students while allowing them to build any sequence of instructions without the burden of conforming with a strict programming language syntax. This allows them to focus on the problem they have to solve, and probably explains why they like it so much. Furthermore, our simulator is expandable to other typical synchronization problems or, potentially, to other instruction sets.
Pedagogical simulator, computer science, process synchronization.